/*
 * @Description  : the signed bit extender for the cpu
 * @authorName   : GuoJi
 * @github       : https://github.com/guoji-kk
 * @gitee        : https://gitee.com/guoji13663585559
 * @email        : 13663585559@163.com
 * @version      : 1.0
 * @Date         : 2023-05-14 23:34:46
 * @LastEditTime : 2023-05-16 20:34:10
 */

module ext(imm16,imm32,ExtOp);  //imm16->imm32
  	input [15:0]imm16;
  	input [1:0]ExtOp;
  	output reg[31:0]imm32;
  
  	//ExtOP: 0->ZERO 0fuhaowei kuozhan;   1->SIGN  fuhaowei kuozhan
  	parameter ZERO =2'b00;
  	parameter SIGN =2'b01;
  	parameter LUI  =2'b10;
  
  	//thre conditions
  	always@(*)begin
    		case(ExtOp)
     		ZERO:imm32={16'b0,imm16}; 
      		SIGN:imm32={{16{imm16[15]}},imm16}; 
      		LUI:imm32={imm16,16'b0};
    		endcase
  	end

endmodule

